Shih-Lien Lu,: шукати на сайті Z-Library

Найбільша колекція наукових статей у сіті. 70,000,000+ безкоштовних статей.

Пожертвування 15 вересня 2024 – 1 жовтня 2024

Z-Library - одна з найбільших онлайн-бібліотек у світі, в якій зберігається більше 17,000,000 книг та 84,837,000 статей. Ми намагаємось зробити літературу доступною кожному. Сьогодні (15 вересня 2024) ми відкриваємо додатковий збір пожертвувань на підтримку та розвиток проекту.

Також БЕЗЛІМТНІ завантаження (протягом 31 дня після завершення пожертвування) доступні для ВСІХ користувачів, які підтримають проект в період збору коштів до 1 жовтня 2024.

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Статті (92)
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[IEEE Eighth International Application Specific Integrated Circuits Conference - Austin, TX, USA (18-22 Sept. 1995)] Proceedings of Eighth International Application Specific Integrated Circuits Conference - VLSI implementation of a 32-bit Kozen formulation Ladner/Fischer parallel prefix adder

Janik, K.J., Shih-Lien Lu,

Рік:

1995

Мова:

english

Файл:

PDF, 244 KB

english, 1995

[ACM Press the 16th international conference - New York, New York, USA (2002.06.22-2002.06.26)] Proceedings of the 16th international conference on Supercomputing - ICS '02 - Bloom filtering cache misses for accurate data speculation and prefetching

Peir, Jih-Kwon, Lai, Shih-Chang, Lu, Shih-Lien, Stark, Jared, Lai, Konrad

Рік:

2002

Мова:

english

Файл:

PDF, 243 KB

english, 2002

A grounded coplanar waveguide technique for microwave measurement of complex permittivity and permeability

Jiqing Hu, Sligar, A., Chih-Hung Chang, Shih-Lien Lu, Settaluri, R.K.

Журнал:

IEEE Transactions on Magnetics

Рік:

2006

Мова:

english

Файл:

PDF, 160 KB

english, 2006

Coming challenges in microarchitecture and architecture

Ronen, R., Mendelson, A., Lai, K., Shih-Lien Lu, Pollack, F., Shen, J.P.

Журнал:

Proceedings of the IEEE

Рік:

2001

Мова:

english

Файл:

PDF, 190 KB

english, 2001

[IEEE 2008 International Conference on Field Programmable Logic and Applications (FPL) - Heidelberg, Germany (2008.09.8-2008.09.10)] 2008 International Conference on Field Programmable Logic and Applications - Novel FPGA based Haar classifier face detection algorithm acceleration

Changjian Gao,, Shih-Lien Lu,

Рік:

2008

Мова:

english

Файл:

PDF, 192 KB

english, 2008

[IEEE 2010 IEEE Custom Integrated Circuits Conference -CICC 2010 - San Jose, CA, USA (2010.09.19-2010.09.22)] IEEE Custom Integrated Circuits Conference 2010 - Dynamic variation monitor for measuring the impact of voltage droops on microprocessor clock frequency

Bowman, Keith, Tokunaga, Carlos, Tschanz, James, Raychowdhury, Arijit, Khellah, Muhammad, Geuskens, Bibiche, Shih-Lien Lu,, Aseron, Paolo, Karnik, Tanay, De, Vivek

Рік:

2010

Мова:

english

Файл:

PDF, 575 KB

english, 2010

[IEEE Tutorial (ICICDT) - Grenoble, France (2008.06.2-2008.06.4)] 2008 IEEE International Conference on Integrated Circuit Design and Technology and Tutorial - Energy-efficient and metastability-immune timing-error detection and recovery circuits for dynamic variation tolerance

Bowman, Keith A., Tschanz, James W., Nam Sung Kim,, Lee, Janice C., Wilkerson, Chris B., Lu, Shih-Lien L., Karnik, Tanay, De, Vivek K.

Рік:

2008

Мова:

english

Файл:

PDF, 445 KB

english, 2008

[IEEE 2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA) - Shenzhen (2013.2.23-2013.2.27)] 2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA) - Technology comparison for large last-level caches (L3Cs): Low-leakage SRAM, low write-energy STT-RAM, and refresh-optimized eDRAM

Mu-Tien Chang,, Rosenfeld, P., Shih-Lien Lu,, Jacob, B.

Рік:

2013

Мова:

english

Файл:

PDF, 464 KB

english, 2013

A Desktop Computer with a Reconfigurable Pentium®

Lu, Shih-Lien L., Yiannacouras, Peter, Suh, Taeweon, Kassa, Rolf, Konow, Michael

Журнал:

ACM Transactions on Reconfigurable Technology and Systems

Рік:

2008

Мова:

english

Файл:

PDF, 327 KB

english, 2008

[IEEE 2019 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - Hsinchu, Taiwan (2019.4.22-2019.4.25)] 2019 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - A High Performance, Low Energy, Compact Masked 128-Bit AES in 22nm CMOS Technology

Chou, Yuan-Hsi, Lu, Shih-Lien L.

Рік:

2019

Файл:

PDF, 655 KB

2019

Speeding up processing with approximation circuits

Shih-Lien Lu

Журнал:

Computer

Рік:

2004

Мова:

english

Файл:

PDF, 334 KB

english, 2004

Error Detection and Correction in Microprocessor Core and Memory Due to Fast Dynamic Voltage Droops

Raychowdhury, A., Tschanz, J., Bowman, K., Shih-Lien Lu, Aseron, P., Khellah, M., Geuskens, B., Tokunaga, C., Wilkerson, C., Karnik, T., De, V.

Журнал:

IEEE Journal on Emerging and Selected Topics in Circuits and Systems

Рік:

2011

Мова:

english

Файл:

PDF, 2.34 MB

english, 2011

2 GHz 2 Mb 2T Gain Cell Memory Macro With 128 GBytes/sec Bandwidth in a 65 nm Logic Process Technology

Somasekhar, D., Yibin Ye, Aseron, P., Shih-Lien Lu, Khellah, M.M., Howard, J., Ruhl, G., Karnik, T., Borkar, S., De, V.K., Keshavarzi, A.

Журнал:

IEEE Journal of Solid-State Circuits

Рік:

2009

Мова:

english

Файл:

PDF, 3.83 MB

english, 2009

Trading Off Cache Capacity for Low-Voltage Operation

Wilkerson, C., Hongliang Gao, Alameldeen, A.R., Chishti, Z., Khellah, M., Shih-Lien Lu

Журнал:

IEEE Micro

Рік:

2009

Мова:

english

Файл:

PDF, 1.42 MB

english, 2009

Adaptive Cache Design to Enable Reliable Low-Voltage Operation

Alameldeen, A.R., Chishti, Z., Wilkerson, C., Wei Wu, Shih-Lien Lu

Журнал:

IEEE Transactions on Computers

Рік:

2011

Мова:

english

Файл:

PDF, 1.53 MB

english, 2011

A 4.5-GHz 130-nm 32-KB L0 cache with a leakage-tolerant self reverse-bias bitline scheme

Hsu, S., Alvandpour, A., Mathew, S., Shih-Lien Lu, Krishnamurthy, R.K., Borkar, S.

Журнал:

IEEE Journal of Solid-State Circuits

Рік:

2003

Мова:

english

Файл:

PDF, 536 KB

english, 2003

[IEEE 2010 IEEE International Solid- State Circuits Conference - (ISSCC) - San Francisco, CA, USA (2010.02.7-2010.02.11)] 2010 IEEE International Solid-State Circuits Conference - (ISSCC) - PVT-and-aging adaptive wordline boosting for 8T SRAM power reduction

Raychowdhury, Arijit, Geuskens, Bibiche, Kulkarni, Jaydeep, Tschanz, Jim, Bowman, Keith, Karnik, Tanay, Lu, Shih-Lien, De, Vivek, Khellah, Muhammad M

Рік:

2010

Мова:

english

Файл:

PDF, 1.65 MB

english, 2010

Reducing cache power with low-cost, multi-bit error-correcting codes

Wilkerson, Chris, Alameldeen, Alaa R., Chishti, Zeshan, Wu, Wei, Somasekhar, Dinesh, Lu, Shih-lien

Журнал:

ACM SIGARCH Computer Architecture News

Рік:

2010

Мова:

english

Файл:

PDF, 1.16 MB

english, 2010

Reducing cache and TLB power by exploiting memory region and privilege level semantics

Fang, Zhen, Zhao, Li, Jiang, Xiaowei, Lu, Shih-lien, Iyer, Ravi, Li, Tong, Lee, Seung Eun

Журнал:

Journal of Systems Architecture

Рік:

2013

Мова:

english

Файл:

PDF, 3.18 MB

english, 2013

[ACM Press the 19th annual international conference - Cambridge, Massachusetts (2005.06.20-2005.06.22)] Proceedings of the 19th annual international conference on Supercomputing - ICS '05 - Characterization of L3 cache behavior of SPECjAppServer2002 and TPC-C

Nurvitadhi, Eriko, Chalainanont, Nirut, Lu, Shih-Lien

Рік:

2005

Мова:

english

Файл:

PDF, 522 KB

english, 2005

[IEEE 2013 IEEE International Symposium on Parallel & Distributed Processing (IPDPS) - Cambridge, MA, USA (2013.05.20-2013.05.24)] 2013 IEEE 27th International Symposium on Parallel and Distributed Processing - Guided Region-Based GPU Scheduling: Utilizing Multi-thread Parallelism to Hide Memory Latency

Chen, Jianmin, Tao, Xi, Yang, Zhen, Peir, Jih-Kwon, Li, Xiaoyuan, Lu, Shih-Lien

Рік:

2013

Мова:

english

Файл:

PDF, 507 KB

english, 2013

[ACM Press the 37th annual international symposium - Saint-Malo, France (2010.06.19-2010.06.23)] Proceedings of the 37th annual international symposium on Computer architecture - ISCA '10 - Reducing cache power with low-cost, multi-bit error-correcting codes

Wilkerson, Chris, Alameldeen, Alaa R., Chishti, Zeshan, Wu, Wei, Somasekhar, Dinesh, Lu, Shih-lien

Рік:

2010

Мова:

english

Файл:

PDF, 1.16 MB

english, 2010

[IEEE 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE 2012) - Dresden (2012.03.12-2012.03.16)] 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE) - Design for test and reliability in ultimate CMOS

Nicolaidis, M., Anghel, L., Zergainoh, N-E, Zorian, Y., Karnik, T., Bowman, K., Tschanz, J., Shih-Lien Lu,, Tokunaga, C., Raychowdhury, A., Khellah, M., Kulkarni, J., De, V., Avresky, D.

Рік:

2012

Мова:

english

Файл:

PDF, 202 KB

english, 2012

[IEEE Seventh Annual IEEE International ASIC Conference and Exhibit - Rochester, NY, USA (19-23 Sept. 1994)] Proceedings Seventh Annual IEEE International ASIC Conference and Exhibit - Experiences in teaching ASIC design using Xilinx FPGA and Mentor Graphics tools

Shih-Lien Lu,

Рік:

1994

Мова:

english

Файл:

PDF, 359 KB

english, 1994

[IEEE 2009 WRI World Congress on Computer Science and Information Engineering - Los Angeles, California USA (2009.03.31-2009.04.2)] 2009 WRI World Congress on Computer Science and Information Engineering - Content Addressable Memory for Low-Power and High-Performance Applications

Patwary, Ataur R., Geuskens, Bibiche M., Lu, Shih-Lien L.

Рік:

2009

Мова:

english

Файл:

PDF, 449 KB

english, 2009

[IEEE 2010 IEEE International Solid- State Circuits Conference - (ISSCC) - San Francisco, CA, USA (2010.02.7-2010.02.11)] 2010 IEEE International Solid-State Circuits Conference - (ISSCC) - A 45nm resilient and adaptive microprocessor core for dynamic variation tolerance

Tschanz, James, Bowman, Keith, Lu, Shih-Lien, Aseron, Paolo, Khellah, Muhammad, Raychowdhury, Arijit, Geuskens, Bibiche, Tokunaga, Carlos, Wilkerson, Chris, Karnik, Tanay, De, Vivek

Рік:

2010

Мова:

english

Файл:

PDF, 3.39 MB

english, 2010

[IEEE Comput. Soc 1998 Fourth International Symposium on High-Performance Computer Architecture - Las Vegas, NV, USA (1-4 Feb. 1998)] Proceedings 1998 Fourth International Symposium on High-Performance Computer Architecture - Non-stalling counterflow architecture

Miller, M.F., Janik, K.J., Shih-Lien Lu,

Рік:

1998

Мова:

english

Файл:

PDF, 83 KB

english, 1998

[IEEE 2008 35th International Symposium on Computer Architecture (ISCA) - Beijing, China (2008.06.21-2008.06.25)] 2008 International Symposium on Computer Architecture - Trading off Cache Capacity for Reliability to Enable Low Voltage Operation

Wilkerson, Chris, Gao, Hongliang, Alameldeen, Alaa R., Chishti, Zeshan, Khellah, Muhammad, Lu, Shih-Lien

Рік:

2008

Мова:

english

Файл:

PDF, 920 KB

english, 2008

[IEEE 2007 25th International Conference on Computer Design ICCD 2007 - Lake Tahoe, CA, USA (2007.10.7-2007.10.10)] 2007 25th International Conference on Computer Design - Improving the reliability of on-chip data caches under process variations

Wei Wu,, Tan, Sheldon X.-D., Yang, Jun, Shih-Lien Lu,

Рік:

2007

Мова:

english

Файл:

PDF, 356 KB

english, 2007

Design of a static MIMD data flow processor using micropipelines

Chih-Ming Chang,, Shih-Lien Lu,

Журнал:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Рік:

1995

Мова:

english

Файл:

PDF, 883 KB

english, 1995

Implementation of micropipelines in enable/disable CMOS differential logic

Shih-Lien Lu,

Журнал:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Рік:

1995

Мова:

english

Файл:

PDF, 421 KB

english, 1995

Efficient arithmetic using self-timing

Ramachandran, R., Shih-Lien Lu,

Журнал:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Рік:

1996

Мова:

english

Файл:

PDF, 1.02 MB

english, 1996

[IEEE 2002 Symposium on VLSI Circuits. Digest of Technical Papers - Honolulu, HI, USA (13-15 June 2002)] 2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302) - A 4.5 GHz 130 nm 32 KB L0 cache with a self reverse bias scheme

Hsu, S.K., Alvandpour, A., Mathew, S., Shih-Lien Lu,, Krishnamurthy, R.K., Borkar, S.

Рік:

2002

Мова:

english

Файл:

PDF, 153 KB

english, 2002

[IEEE 2010 IEEE Symposium on VLSI Circuits - Honolulu, HI, USA (2010.06.16-2010.06.18)] 2010 Symposium on VLSI Circuits - Tunable replica bits for dynamic variation tolerance in 8T SRAM

Raychowdhury, Arijit, Geuskens, Bibiche, Bowman, Keith, Tschanz, James, Lu, Shih-Lien, Karnik, Tanay, Khellah, Muhammad, De, Vivek

Рік:

2010

Мова:

english

Файл:

PDF, 579 KB

english, 2010

Active Cache Emulator

Nurvitadhi, E., Jumnit Hong,, Shih-Lien Lu,

Журнал:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Рік:

2008

Мова:

english

Файл:

PDF, 1.53 MB

english, 2008

[IEEE 2010 15th Asia and South Pacific Design Automation Conference ASP-DAC 2010 - Taipei, Taiwan (2010.01.18-2010.01.21)] 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC) - Resilient design in scaled CMOS for energy efficiency

Tschanz, James, Bowman, Keith, Khellah, Muhammad, Wilkerson, Chris, Geuskens, Bibiche, Somasekhar, Dinesh, Raychowdhury, Arijit, Kulkarni, Jaydeep, Tokunaga, Carlos, Shih-Lien Lu,, Karnik, Tanay, De,

Рік:

2010

Мова:

english

Файл:

PDF, 66 KB

english, 2010

[IEEE 13th Annual IEEE International ASIC/SOC Conference - Arlington, VA, USA (13-16 Sept. 2000)] Proceedings of 13th Annual IEEE International ASIC/SOC Conference (Cat. No.00TH8541) - Interpolation-based digital quadrature frequency synthesizer

Larson, R., Shih-Lien Lu,

Рік:

2000

Мова:

english

Файл:

PDF, 444 KB

english, 2000

[IEEE Ninth Annual IEEE International ASIC Conference and Exhibit - Rochester, NY, USA (23-27 Sept. 1996)] Proceedings Ninth Annual IEEE International ASIC Conference and Exhibit - Low power design of two-dimensional DCT

Li, J., Shih-Lien Lu,

Рік:

1996

Мова:

english

Файл:

PDF, 478 KB

english, 1996

[IEEE Sixth Annual IEEE International Workshop on Workload Characterization. WWC-6 - Austin, TX, USA (27 Oct. 2003)] 2003 IEEE International Conference on Communications (Cat. No.03CH37441) - Real-time L3 cache simulations using the Programmable Hardware-Assisted Cache Emulator (PHA$E)

Chalainanont, N., Nurvitadhi, E., Morrison, R., Lixin Su,, Kingsum Chow,, Shih-Lien Lu,, Lai, K.

Рік:

2003

Мова:

english

Файл:

PDF, 600 KB

english, 2003

[IEEE 2007 International Conference on Field Programmable Logic and Applications - Amsterdam, Netherlands (2007.08.27-2007.08.29)] 2007 International Conference on Field Programmable Logic and Applications - An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems

Suh, Taeweon, Lu, Shih-Lien, Lee, Hsien-Hsin S.

Рік:

2007

Мова:

english

Файл:

PDF, 341 KB

english, 2007

[IEEE Eleventh Annual IEEE International ASIC Conference - Rochester, NY, USA (13-16 Sept. 1998)] Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372) - Reusable Architectures And Intellectual Property

Krishnamurthy, R., Shih-Lien Lu,

Рік:

1998

Мова:

english

Файл:

PDF, 49 KB

english, 1998

[IEEE Comput. Soc International Conference on Dependable Systems and Networks - Washington, DC, USA (23-26 June 2002)] Proceedings International Conference on Dependable Systems and Networks - Ditto processor

Shih-Chang Lai,, Shih-Lien Lu,, Lai, K., Jih-Kwon Peir,

Рік:

2002

Мова:

english

Файл:

PDF, 359 KB

english, 2002

[IEEE 2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA) - Orlando, FL, USA (2014.2.15-2014.2.19)] 2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA) - Sandbox Prefetching: Safe run-time evaluation of aggressive prefetchers

Pugsley, Seth H, Chishti, Zeshan, Wilkerson, Chris, Chuang, Peng-fei, Scott, Robert L, Jaleel, Aamer, Lu, Shih-Lien, Chow, Kingsum, Balasubramonian, Rajeev

Рік:

2014

Мова:

english

Файл:

PDF, 609 KB

english, 2014

DArT: A Component-Based DRAM Area, Power, and Timing Modeling Tool

Shih, Hsiu-Chuan, Luo, Pei-Wen, Yeh, Jen-Chieh, Lin, Shu-Yen, Kwai, Ding-Ming, Lu, Shih-Lien, Schaefer, Andre, Wu, Cheng-Wen

Журнал:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Рік:

2014

Мова:

english

Файл:

PDF, 3.18 MB

english, 2014

[IEEE 2013 21st IEEE International Conference on Network Protocols (ICNP) - Goettingen, Germany (2013.10.7-2013.10.10)] 2013 21st IEEE International Conference on Network Protocols (ICNP) - Guided multiple hashing: Achieving near perfect balance for fast routing lookup

Xi Tao,, Yan Qiao,, Jih-Kwon Peir,, Shigang Chen,, Zhuo Huang,, Shih-Lien Lu,

Рік:

2013

Мова:

english

Файл:

PDF, 315 KB

english, 2013

[IEEE 2009 International Conference on Communications, Circuits and Systems (ICCCAS) - Milpitas, CA, USA (2009.07.23-2009.07.25)] 2009 International Conference on Communications, Circuits and Systems - Low-power Ternary Content Addressable Memory (TCAM) array for network applications

Patwary, Ataur R., Geuskens, Bibiche M., Lu, Shih-Lien L.

Рік:

2009

Мова:

english

Файл:

PDF, 500 KB

english, 2009

[IEEE 2011 IEEE 9th Symposium on Application Specific Processors (SASP) - San Diego, CA, USA (2011.06.5-2011.06.6)] 2011 IEEE 9th Symposium on Application Specific Processors (SASP) - Integrating formal verification and high-level processor pipeline synthesis

Nurvitadhi, Eriko, Hoe, James C., Kam, Timothy, Lu, Shih-Lien L.

Рік:

2011

Мова:

english

Файл:

PDF, 1.49 MB

english, 2011

[IEEE MICRO 33. 33rd Annual International Symposium on Microarchitecture - Monterey, CA, USA (10-13 Dec. 2000)] Proceedings 33rd Annual IEEE/ACM International Symposium on Microarchitecture. MICRO-33 2000 - Performance improvement with circuit-level speculation

Tong Liu,, Shih-Lien Lu,

Рік:

2000

Мова:

english

Файл:

PDF, 767 KB

english, 2000

[ACM Press the 42nd Annual IEEE/ACM International Symposium - New York, New York (2009.12.12-2009.12.16)] Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture - Micro-42 - Improving cache lifetime reliability at ultra-low voltages

Chishti, Zeshan, Alameldeen, Alaa R., Wilkerson, Chris, Wu, Wei, Lu, Shih-Lien

Рік:

2009

Мова:

english

Файл:

PDF, 1.56 MB

english, 2009

[IEEE 2002 Symposium on VLSI Circuits. Digest of Technical Papers - Honolulu, HI, USA (13-15 June 2002)] 2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302) - A leakage-tolerant dynamic register file using leakage bypass with stack forcing (LBSF) and source follower NMOS (SFN) techniques

Tang, S., Hsu, S., Ye, Y., Tschanz, J., Somasekhar, D., Narendra, S., Shih-Lien Lu,, Krishnamurthy, R., De, V.

Рік:

2002

Мова:

english

Файл:

PDF, 177 KB

english, 2002